Princeton University

School of Engineering & Applied Science

Exploring Mixed-signal Computation for Energy Aggressive Interface Architectures

Speaker: 
Jintao Zhang
Advisor: 
Prof. Verma
Location: 
Engineering Quadrangle B327
Date/Time: 
Wednesday, March 6, 2019 - 2:30pm to 4:00pm

Abstract

The attempts to gather information about the state of the world has never stopped. However, the process of extract the information is challenging since the signals naturally arise from the complex physics of real-world processes includes physiological signals and images. To better analyze the data, machine-learning algorithms were proposed to address the challenges. Because the algorithms can construct models from the data themselves, we no longer need to create complex analytical models for the data.

While machine-learning algorithms have the benefits, they typically have high computed complexity and high energy cost when implemented in the system. The focus of this thesis is the realization of such algorithms but in highly energy-constrained sensing devices.

To overcome the limitations, the thesis focused on using mixed-signal computation within unconventional architectures, which are unavoidable in traditional digital application-specific architectures. The approach brings in a new trade-off into the system, since mixed-signal computation does have lower energy, but incurs more non-idealities within the system, which may significantly affect the overall system performance. During the design process, we are dedicated to finding a balance between the reduction of system energy and overall system performance. One of our approach to maintain high overall system level performance, we use several techniques such as Data Driven Hardware Resilience (DDHR) to compensate the non-idealities. The machine-learning models used in our system can thus adapt to these non-idealities, leads to design-level relaxation and efficient system implementations.

The thesis demonstrates multiple hardware systems designed in mixed-signal computing architecture. This includes a Time-domain Analog-to-Digital Converter (ADC) with Support Vector Machine (SVM) accelerator, to show the idea of DDHR in an embedded seizure detection system when overcoming analog non-idealities. Then, a SAR-ADC based matrix multiplier, referred to as the Matrix-Multiplying ADC (MMADC), is demonstrated as an example for mixed-signal computing. Then, an SRAM-based strong classifier (ClassRAM) is demonstrated. Further, system-level trade-offs and specialized algorithms are analyzed and developed, based on the in-memory architecture extended from ClassRAM, which enhance the application-level computational scalability of the architectures.