Princeton University

School of Engineering & Applied Science

Where Green Electronics meet Gray Matter!

Speaker: 
Deblina Sarkar, MIT
Location: 
E-Quad, B205
Date/Time: 
Wednesday, April 27, 2016 - 4:30pm

Abstract:
The aggressive scaling of electronic switches or transistors, has sustained the growth of Information Technology for more than past four decades. However, the current technology faces severe issues in both dimensional and voltage scaling. The challenge in dimensional scalability is due to the degradation of device electrostatics while the voltage in-scalability arises from the fundamental thermal limitation in the steepness of turn-on characteristics or subthreshold swing of conventional Field-Effect Transistors. This not only ushers in the dead end of the growth of Information Technology, but more critically, the increase in power consumption and dissipation due to the inability to scale the supply voltage, poses a threat to the environment by raising the production of Greenhouse Gas, which contributes towards global warming.
 
In this talk, I will discuss novel two-dimensional (2D) materials (MoS2, WSe2 etc) for obtaining improved electrostatic control, and Tunneling-Field-Effect-Transistors (TFETs), employing a fundamentally different carrier transport mechanism in the form of band-to-band tunneling for achieving energy-efficient and hence, green electronics. Specifically, I will present my work on the first experimental demonstration of TFETs based on 2D channel material, to beat the fundamental thermal limitation in subthreshold swing (SS). This device is the first ever TFET, in a planar architecture to achieve sub-thermionic SS over 4 decades of drain current, a necessary characteristic prescribed by the International Technology Roadmap for Semiconductors and in fact, the only TFET to date, to achieve so, in any architecture and in any material platform, at a low power-supply voltage of 0.1 V. It also represents the world's thinnest channel sub-thermal transistor, thus, cracking the long-standing issue of simultaneous dimensional and power supply scalability.
 
While computational systems based on sub-thermal ultra-scalable transistors can sustain the growth of Information Technology in near to mid future, they still cannot match their biological counterpart: the brain. Understanding the brain, can not only transform the way electronic computations are performed today but can open up new avenues for treatment of neuronal disorders. Decoding the brain will require mapping of both its functional activity as well as structural connectivity or connectomics. I will show that, the material and device technology which have evolved, mainly with an aim of power reduction in digital electronics, can revolutionize the completely diverse field of brain activity mapping and in general bio-sensing technology. Finally, I will briefly touch upon my on-going work on the super-resolution structural mapping of neuronal connectomics for understanding the molecular building blocks of the brain.    

[1] D. Sarkar et. al., Nature, 526 (7571), 91, 2015; [2] D. Sarkar et. al., Nano Lett., 15 (5), 2852, 2015; [3] D. Sarkar et. al., ACS Nano., 8 (4), 3992, 2014; [4] D. Sarkar et. al., Appl. Phys. Lett., 100 (14), 143108, 2012.
 
Bio:
Deblina Sarkar completed her PhD in the Electrical and Computer Engineering department at UCSB in 2015. She is currently a postdoctoral researcher in the Synthetic Neurobiology group at MIT. Her research, which combines the interdisciplinary fields of engineering, physics and biology, aims to bridge the gap between nanotechnology and synthetic biology to create a new paradigm for computational electronics as well as to invent disruptive technologies for neuroscience.
 
Ms. Sarkar is the lead author of publications in several eminent journals such as Nature, Nano Lett., ACS Nano, TED etc as well as prestigious conferences such as IEDM, DRC, IITC and has authored/coauthored more than 30 papers till date. Several of her works have appeared in popular press. She is the recipient of numerous awards and recognitions, including U.S. Presidential Fellowship (2008), Outstanding Doctoral Candidate Fellowship (2008), being one of three researchers worldwide to receive the prestigious IEEE EDS PhD Fellowship Award (2011), a "Bright Mind" invited speaker at the KAUST-NSF conference (2015), one of three winners of the Falling Walls Lab Young Innovator's competition at San Diego (2015), "Materials Research Society's Graduate Student Award" (2015) and has been named a "Rising Star" in Electrical Engineering and Computer Science (2015).