Princeton University

School of Engineering & Applied Science

Minjie Chen

Assistant Professor of Electrical Engineering & Andlinger Center for Energy and the Environment

Room: 217 Andlinger Center for Energy and the Environment
Phone: 609-258-7656
Webpage: PERL Lab


  • PhD, Massachusetts Institute of Technology, 2015
  • BS, Tsinghua University, 2009

Princeton Power Electronics Lab's research aims at developing fundamental and novel power electronics solutions to enable and support a wide range of applications. Heading towards a greener, smarter, and highly interconnected future, it is time for us to replace the bulky and lossy “power cabinets” and “bricks” with well-optimized and highly-integrated “power sticks” and “chips” that will make future electronic systems much smaller, sustainable, and more capable. There are exciting opportunities and challenges in pushing the performance boundary of power electronics. Advances are enabled by new architectures and design concepts, and supported by rapid developments in power semiconductor devices, passive components and fabrication techniques that can greatly change the design space.
Optimally designed high frequency power electronics leveraging these state-of-the-art techniques promises order-of-magnitude higher power density. However, circuit timing and control, parasitics, magnetics, and thermal management all pose difficulties in high frequency designs. Both existing and entirely new applications – ranging from mW-scale energy harvesting circuits in portable devices, to kW or MW systems in electric vehicles, data centers, and renewable integration – require specialized power electronics which either present substantial room for improvement, or for which there is as yet no adequate solution.
Minjie Chen received his Ph.D. degree from MIT in 2015, and received his B.S. degree from Tsinghua University in 2009. Before joining Princeton University, he was a postdoctoral associate at MIT RLE, doing research on advanced power conversion architecture and power magnetics. He is the recipient of an IEEE Transaction First Prize Paper Award, the Chorafas Foundation Award for outstanding Ph.D.
thesis, the E.E. Landsman Fellowship, the First Prize Award in IEEE ECCE Student Demo Competition, and an Outstanding Reviewer Award from IEEE Transactions on Power Electronics. He has three patents issued and has a few patents pending.

Honors and Awards

  • First Place Transaction Prize Paper Award, IEEE Power Electronics Society
  • Dimitris N. Chorafas Award for Outstanding Ph.D. Thesis, MIT
  • Siebel Energy Institute Grant, Siebel Foundation
  • E.E. Landsman Fellowship, MIT

Selected Publications

  1. Y. Ni, S. Pervaiz, M. Chen and K. K. Afridi, "Energy Density Enhancement of Stacked Switched Capacitor Energy Buffers Through Capacitance Ratio Optimization," IEEE Transactions on Power Electronics, vol. 32, no. 8, pp. 6363-6380, Aug. 2017.

  2. MultiTrack Power Conversion Architecture, "M. Chen, K. K. Afridi, C.

    Sombuddha and D. J. Perreault," IEEE Transactions on Power Electronics, vol. 32, no. 1, pp. 325-340, Jan. 2017.

  3. Y. Tang, M. Chen, and L. Ran, "A Compact MMC Submodule Structure With Reduced Capacitor Size Using the Stacked Switched Capacitor Architecture," IEEE Transactions on Power Electronics, vol. 31, no.

    10, pp. 6920-6936, Oct. 2016.

  4. M. Chen, M. Araghchini, K. K. Afridi, J. H. Lang, C. R. Sullivan and D. J. Perreault, "A Systematic Approach to Modeling Impedances and Current Distribution in Planar Magnetics," IEEE Transactions on Power Electronics , vol.31, no.1, pp. 560–580, January, 2016.

  5. M. Chen, K. K. Afridi, and D. J. Perreault, "A Multilevel Energy Buffer and Voltage Modulator for Grid-Interfaced Micro-inverters,"

    IEEE Transactions on Power Electronics, 30(3): 1203-1219, Mar. 2015.

  6. K. K. Afridi, M. Chen, and D. J. Perreault, "Enhanced Stacked Switched Capacitor Energy Buffer Architecture," IEEE Transactions on Industry Applications, 50(2): 1141-1149, Mar. 2014.

  7. M. Chen, K. K. Afridi, and D. J. Perreault, "Stacked Switched Capacitor Energy Buffer Architecture," IEEE Transactions on Power Electronics, 28(11): 5183-5195, Nov. 2013.