Princeton University

School of Engineering & Applied Science

Sharad Malik

Chair, Department of Electrical Engineering

George Van Ness Lothrop Professor in Engineering

Professor of Electrical Engineering

Room: B212 Engineering Quadrangle
Phone: 609-258-4625
Webpage: Malik Lab: Computer Systems: Verification and Security

Curriculum Vitae


  • Ph.D., Univ. of California, Berkeley, 1990
  • M.S., Computer Science, Univ. of California, Berkeley, 1987
  • B.Tech., Electrical Engineering, Indian Institute of Technology, New Delhi, 1985

I am broadly interested in designing computing systems that are functionaly correct and secure. My work combines system design with mathematical modeling and analysis techniques for proving functional correctness and security properties for these systems. We do this through studying new modeling techniques as well as algorithms for correctness proofs. Most recently my research has focused on developing the Instruction-Level Abstraction (ILA) model for scalable systems-on-chip design and verification. In the past my group has worked on efficient solvers for Boolean Satisfiability problems (SAT and MAX-SAT) which are fundamental techniques used in system verification and other applications.

I am also open to advising projects where the ideas are initiated by students - these could involve hardware, software or theory - I am very open!

Honors and Awards

  • Intel Corporate Research Council Outstanding Researcher Award (Security and Software Sector), 2018
  • IEEE CEDA A. Richard Newton Technical Impact Award in Electronic Design Automation, 2017
  • The IEEE/ACM Design Automation Conference 50th Anniversary Most Cited Paper Award: (with M. W. Moskewicz, C. F. Madigan, Y. Zhao and L. Zhang) For publishing the most cited paper in DAC's 50 year history, 2013
  • IEEE/ACM International Conference on Computer-Aided Design, Ten Year Retrospective Most Influential Paper Award, 2011
  • Computer-Aided Verification (CAV) Award for fundamental contributions to the development of high-performance Boolean satisfiability solvers, 2009
  • Princeton University President’s Award for Distinguished Teaching, 2009

Selected Publications

  1. “Instruction-Level Abstraction (ILA): A Uniform Specification for System-on-Chip (SoC) Verification,” (with B-Y. Huang, H. Zhang, P. Subramanyan, Y. Vizel, and A. Gupta), ACM Transactions on Design Automation of Electronic Systems (TODAES), 24(1): 10:1-10:24 (2019)


  2. “ Integrating Memory Consistency Models with Instruction-Level Abstraction for Heterogeneous System-on-Chip Verification,” with H. Zhang, C. Trippel, Y Manerkar, A. Gupta, and M Martonosi, Formal Methods in Computer-Aided Design (FMCAD), 2018


  3. Propositional SAT Solving, in Handbook of Model Checking (with J. Marques-Silva) 2018: 247-275


  4. “Reverse Engineering Digital Circuits Using Structural and Functional Analyses,” (with P. Subramanyan, N. Tsiskaridze, W. Li, A. Gascon, W. Y. Tan, A. Tiwari, N. Shankar, S. Seshia), IEEE Transactions on Emerging Topics in Computing, vol.2, no.1, pp.63-80, March 2014


  5. “Boolean Satisfiability: From Theoretical Hardness to Practical Success,” (with L. Zhang), Invited Paper, Communications of the ACM, Volume 52, Number 8, August 2009

  6. “Validating SAT Solvers Using an Independent Resolution-Based Checker: Practical Implementations and Other Applications,” (with L. Zhang), Best Paper Award, Design Automation and Test in Europe (DATE), 2003


  7. “Efficient Constraint Driven Learning in a Boolean Satisfiability Solver,” (with L. Zhang, C. Madigan, M. Moskewicz), ICCAD 2001. ICCAD Ten Year Retrospective Most Influential Paper Award, 2011.


  8. “Chaff: Engineering an Efficient SAT Solver”, (with M. W. Moskewicz, C. F. Madigan, Y. Zhao and L. Zhang), DAC 2001. The IEEE/ACM Design Automation Conference 50th Anniversary Most Cited Paper Award, 2013.


  9. “Accelerating Boolean Satisfiability with Configurable Hardware”, (with P. Zhong, M. Martonosi and P. Ashar), FCCM 98. Selected for inclusion in “Significant Contributions from 20 Years of the International IEEE Symposium on Field-Programmable Custom Computing Machines (1993-2013).


  10. “Power Analysis of Embedded Software: A First Step Towards Software Power Minimization”, (with V. Tiwari and A. Wolfe), IEEE International Conference on Computer-Aided Design, November 1994. Selected for inclusion in “The Best of ICCAD – 20 Years of Excellence in Computer-Aided Design,” 2003.


  11. “On Solving the Partial MAX-SAT Problem,” (with Z. Fu), 9th International Conference on Theory and Applications of Satisfiability Testing (SAT), Lecture Notes in Computer Science (LNCS), Volume 4121/2006