Naveen Verma

Professor of Electrical Engineering
Phone: 
609-258-1424
Email Address: 
nverma@princeton.edu
Assistant: 
Office Location: 
B226 Engineering Quadrangle
Degrees: 
  • Ph.D., Massachusetts Institute of Technology, 2009
  • M.Sc., Electrical Engineering Massachusetts Institute of Technology, 2005
  • B.A.Sc., Computer Engineering, University of British Columbia, 2003

Professor of Electrical Engineering
Associated Faculty in the Andlinger Center for Energy and the Environment
Associated Faculty in the Princeton Center for the Science and Technology of Materials (PRISM)

Over the last four decades, the capabilities of integrated circuits (ICs) have expanded at an exponential rate according to Moore's Law. As a result, their application space has also expanded, from isolated server rooms to desktops to personal-area swarms to within the body. The pace has brought ICs to a point where they now face fundamental limits of energy, density, and performance. As a result, modern IC design requires new methods of scaling. Fortunately, since ICs have expanded into such a broad range of applications, there are many new opportunities to push their limits. These opportunities, however, are extremely diverse, requiring circuits that exploit the properties of new algorithms, new materials and devices, and new application characteristics.

Our research focuses on analog and digital integrated circuits. Our emphasis is on developing system platforms for emerging applications, especially where considerable computation and instrumentation is required but energy is severely constrained. Important examples include implantable and wearable biomedical systems and remote sensing and processing network nodes.

To drive this, there are two broad thrusts to our research: (1) application driven circuits and algorithms for ultra-low-power systems, and (2) platform components for low-power processing and communication in advanced and emerging technologies.

By focusing on specific application domains, electronic systems can perform rich sensor acquisition and efficient algorithm computation. We aim to develop analog topologies to acquire diverse, multi-channel biomedical signals, and algorithm computation engines to extract specific correlations with physiological processes and conditions. Low-power processing and communication are critical means to reduce system power. To make their broad utilization increasingly viable, we aim to develop logic, connectivity circuits, and memory circuits (e.g., SRAM) to overcome emerging limitations in advanced technologies (e.g., nanometer CMOS) and alternate technologies (e.g., thin-film large-area electronics).

 

 

Publications List: 
  1. N. R. Shanbhag, N. Verma, Y. Kim, A. D. Patil and L. R. Varshney, "Shannon-Inspired Statistical Computing for the Nanoscale Era," Proc. of the IEEE (PIEEE), vol. 107, no. 1, pp. 90-107, Jan. 2019.

  2. H. Jia, Y. Tang, H. Valavi, J. Zhang, and N. Verma, “A Microprocessor implemented in 65nm CMOS with Configurable and Bit-scalable Accelerator for Programmable In-memory Computing,” arXiv: 1811.04047.

  3. H. Valavi, P. Ramadge, E. Nestler, and N. Verma, “A 64-Tile 2.4-Mb In-Memory-Computing CNN Accelerator Employing Charge-Domain Compute,” IEEE J. of Solid-State Circuits (JSSC), vol. 54, no. 6, pp. 1789-1799, June 2019.

  4. M. Ozatay and N. Verma, “Exploiting Emerging Sensing Technologies Towards Structure in Data for Enhancing Perception in Human-centric Applications,” IEEE Internet of Things Journal, vol. 6, no. 2, pp. 3411-3422, Nov. 2018.

  5. N. Verma, Y. Hu, L. Huang, W. Rieutort-Louis, J. Sanz Robinson, T. Moy, B. Glisic, S. Wagner, J. C. Sturm, "Enabling Scalable Hybrid Systems: architectures for exploiting large-area electronics in applications," Proc. of IEEE, vol. 103, no. 4, pp. 690-712, April 2015.

Google Scholar Profile

Honors and Awards:

  • Distinguished Lecturer, IEEE Solid-State Circuits Society (2015 - 2017)
  • IEEE Trans. Comp., Pack. & Manu. Tech., Best Paper Award (2015, awarded 2016)
  • Princeton Engineering Council Excellence in Teaching Award (2015)
  • VLSI Symp. on Circuits Best Student Paper Award (2013, awarded 2014)
  • AFOSR Young Investigator Research Program (YIP) Award (2014)
  • Intel Early Career Faculty Honor Program Award (2013)
  • NSF CAREER Award (2013)
  • Alfred Rheinstein Faculty Award, Princeton School of Engineering and Applied Sciences (2012)
  • Princeton Innovation Forum 1st Place (2012)
  • Jack Kilby Outstanding Student Paper Award Int. Solid-State Circuits Conf. (2008)
  • Intel Foundation Ph.D. Fellowship Program Award Intel (2008)
  • NSERC Postgraduate Fellowship NSERC (2008)
  • DAC/ISSCC Student Design Contest Winner DAC/ISSCC (2006)